Integrated circuits (ICs) contain up to billions of gates or transistors that change their electrical state in sequences that perform the functions of the IC. These ICs have external connections (bumps, pins, etc.) that are routed to other electrical components to allow the ICs to perform as part of a system. ICs may fail to operate properly at any time during design, manufacture, or after shipment to users of the products in which they are installed. During manufacture, ICs are typically tested at two stages. The first stage is while the ICs, customarily referred to as “die”, are still on the wafer that is patterned with other die during manufacture. The wafers are placed in a wafer prober and accessed for testing with a pin pad that connects to the external connections and routes these electrical paths to an automatic tester (ATE). The second stage generally occurs after the die are removed or separated from the wafer and prepared or packaged as a finished product. The finished product packages are typically placed in a socket that provides an electrical connection through the contacts of the package to the die for testing with an automatic tester (ATE).
Electronic devices (e.g., transistors, diodes, etc.) and their respective active regions inside the IC are connected with metal lines or traces, sometimes many layers of metal lines or traces. The side of the die that has these metal lines and is customarily referred to as the “frontside”. The opposite side, customarily referred to as the “backside” or substrate, has no metal connections. Bed-of-nails connectors or other electrical probes facilitate testing inside the IC. For example, legacy probing was performed by establishing contact between metallic or otherwise conducting probes to the frontside metal lines. In more recent years, this has become increasingly problematic as the layers of metal lines increases. However, since direct access to the active regions is available through the backside, various techniques have been developed to allow access through the backside to determine voltages, parametrics, logic states, and other information or electrical properties of the electronic devices. Tests (e.g., creating perturbations of voltages and currents) are carried out by external test equipment by applying signals to the external connections on the die, then some technique is applied in order to read perturbations at or around one or more active regions (e.g., a transistor of a buffer or gate, or a transistor of a sequential logic element).
Some techniques applied in order to read or create perturbations of one or more active regions take advantage of certain properties of the silicon substrate; in particular, the property that infrared light can pass through the substrate, and a portion of the infrared light is reflected back through the substrate. Some light-based techniques are briefly discussed below:
Light Induced Voltage Alteration: Reading perturbations of one or more active regions is sometimes possible using light-induced voltage alteration (LIVA). Using this technique, external test equipment (e.g., ATE) applies certain electrical potential and applies other conditions to the external connections of the IC to bring and hold the internal electrical states into a known static state. Then, external illumination is provided through the substrate of the IC (e.g., through to various internal areas). A change in the power supply demands from the external test equipment (e.g., ATE) as a result of perturbation from the external illumination is used to indicate the logic state of the device. Unfortunately, techniques used to date provide only gross measurements, and detection of the changes in logic are far slower than the clock rates of modern ICs, thus rendering this technique suited for only some forms of static analysis.
Photon Emission Mapping: This legacy technique uses external test equipment to apply electrical conditions to the external connections of the IC, thus to move the internal electrical state to a particular state. Photons reflected from the various active areas at infrared (IR) wavelengths are detected with an IR camera. Emission strength indicates logic states across the field of view. Unfortunately, techniques used to date provide only gross measurements, and detection of the changes in the infrared wavelengths are far slower than the clock rates of modern ICs, thus rendering this technique suited for only some forms of static analysis.
Dynamic Laser Probing: Laser-based illumination is reflected from the active regions carrying electronic perturbations at or near the active regions. The perturbations are converted into electrical signals by detectors. Electronics states within the IC are varied over a time period, and the changes in the perturbations are detected as the states vary over the same time period.
In some cases, the outputs of these detectors have been used with analog measurement tools to sweep a field of view and to locate changing values that are changing at specific frequencies. Such detected frequencies are marked spatially with symbols on an image of the part. In other cases, these techniques use signal digitizing tools such as oscilloscopes at a single point to examine timing measurements. One application has been to display several cycles of a signal to measure rise time, pulse width, jitter, and other timing related parameters.
Unfortunately, the limitations inherent in the aforementioned light-induced voltage alteration and dynamic laser probing techniques render such legacy techniques unable to meet the demands of high-speed wafer-level and at-speed testing.
Moreover, none of the aforementioned technologies have the capabilities to perform the herein-disclosed techniques for at-speed integrated circuit device observation and analysis of a pre-selected set of sites for fast through-silicon in-circuit logic analysis. Therefore, there is a need for an improved approach.